The Wire Does the Math

That warmth is not the phone thinking. It is the phone walking. For every word it wrote, it fetched a large part of the model from memory, carried it across a few millimeters of silicon to the place where arithmetic happens, did a small amount of arithmetic, and threw the numbers away so it could fetch them again for the next word. The heat in your hand is mostly the cost of that walk.

This piece is about the chips that refuse to take the walk. They are called analog in-memory computers, and after forty years as a laboratory curiosity they are, this year, shipping as silicon, signing automotive contracts, and running language models. To see why they matter, and where they will not matter for a long time, you only need one principle.

01 · The principleMoving costs more than thinking

In 1945 John von Neumann sketched the computer we still build: memory in one place, a processor in another, and a channel between them. Everything a program knows lives in memory; everything it does happens in the processor; and every fact must cross the channel to be used. In 1977 John Backus gave the channel its permanent name in his Turing Award lecture, the von Neumann bottleneck, and complained that programmers spent their lives arranging traffic through it.

For decades the bottleneck was an annoyance. Then transistors got so cheap and so small that arithmetic became nearly free, and the channel did not shrink with them. Arithmetic is a few transistors switching side by side. Fetching a number from off-chip memory means driving a long wire, through a package, across a board, and back. Wires do not get cheaper when transistors do.

Now look at what a language model does when it talks. At each word, it multiplies a short vector, the current state of the sentence, by every weight matrix in the model. For a single user, each weight is fetched once and used for exactly one multiply-and-add before it is discarded. That is the worst ratio of walking to working that a computer can have. The industry’s answer has been to stack memory right beside the processor and widen the channel, which is why high-bandwidth memory is the scarcest, most expensive part of every AI server built this year. It is a heroic answer. It is also an admission: the channel is the problem, so we keep paying to make the channel fatter.

A chip that talks one word at a time is not limited by how fast it can think. It is limited by how fast it can remember.

02 · The physicsOhm multiplies, Kirchhoff adds

Here is the idea that analog computing has been holding since the nineteenth century. You do not need to fetch a weight to multiply by it, if the weight is a physical property of the place where the multiplication happens.

Lay wires in a grid, rows one way and columns the other, and put one programmable device at every crossing. That is a crossbar, the scene at the top of this page. Drive the rows with the input vector. Each column wire collects a sum of products, which is exactly one entry of a matrix-vector multiply. A 256 by 256 crossbar does 65,536 multiply-and-adds in a single step of physics, in nanoseconds, and not one weight leaves its cell.

The devices that hold the weights vary, and the variety is part of the story. IBM uses phase-change memory, a glassy material whose resistance depends on how crystalline it is. TetraMem and the Peking University group use resistive RAM, where a filament of atoms grows or shrinks. Sagence uses ordinary flash cells run far below their normal voltages. EnCharge does not use a resistor at all: it stores and sums charge on tiny metal capacitors, which are steadier than transistors. Different materials, same principle. Put the weight where the math is, and let the wire do the math.

03 · HistoryWhy analog lost, and why it is back

Analog computers came first. Vannevar Bush’s differential analyzer solved equations with spinning shafts in 1931, and electronic analog machines aimed guns and simulated aircraft for decades. They lost to digital for one reason: noise. A voltage that stands for 0.731 might really be 0.729 because the room warmed up. Pass that error through ten stages and it compounds. Digital logic restores every signal to a clean 0 or 1 at every gate, so errors cannot pile up. That guarantee is worth an enormous amount of wasted energy, and for spreadsheets and banking it still is.

Neural networks changed the bargain because they are not spreadsheets. They are statistical machines that were trained by bumping millions of numbers around with random noise, and they keep working when you round their weights to four bits. Your own brain computes with leaky, noisy synapses on about twenty watts. The question for analog AI was never whether the chip could be perfect. It was whether the model could be taught to expect an imperfect chip.

That question now has an answer. In work presented at NeurIPS last December, IBM Research showed that you can take an existing large language model and teach it to live on analog hardware with a short extra round of training that uses less than one percent of its original pretraining data. Their analog versions of Phi-3-mini and Llama-3.2-1B, run under noise measured from real chips, performed about as well as the same models squeezed to 4-bit weights for ordinary digital hardware. The fix was not a perfect device. It was a model that had met the noise before.

Drag the slider in the scene above to see the trade. At a few percent of device noise the green bars barely leave their outlines. At thirty percent they wander. Real chips live near the left end of that slider, and trained models shrug at it.

04 · The asymmetryThe record and the studio

The most useful way to think about analog AI is a vinyl record. A record is made once, in a studio, with expensive and exacting equipment. Then it is played a million times on cheap hardware, and the groove does the work. Nobody records an album by cutting grooves in real time.

The physics of the nudge is the whole problem. When you push a phase-change or resistive cell up by one pulse and down by one pulse, it rarely lands where it started. A 2025 analysis by academic and IBM researchers showed that this asymmetry quietly adds a hidden penalty to the training objective, so the network learns something slightly different from what you asked for. A 2026 paper at AISTATS put the bar plainly: training in memory typically needs devices with at least 8 bits of reliable conductance states to match digital training, and most devices do not have them.

The field is attacking this from both ends. On the algorithm side, schemes such as IBM’s Tiki-Taka family and the new multi-tile residual learning spread one weight across several devices so their errors cancel. On the materials side, electrochemical RAM, which moves ions in and out of a channel like a tiny battery, nudges far more symmetrically; a group at POSTECH presented a 64 by 64 ECRAM array integrated with its own circuits for on-chip training this September. And Peking University reported in January that its resistive-memory analog solver trained recommendation models on datasets the size of Netflix’s and Yahoo’s about twelve times faster than advanced digital processors, at more than two hundred times the energy efficiency.

Read those results closely and you see the honest state of the art. Analog training works on small networks and on particular kinds of math. Nobody has pretrained a large transformer in memory, and nobody in the published record is claiming to be close. Microsoft’s team said the quiet part in its Nature paper on an analog optical computer last year: in commercial deployments, training is a small slice of total energy, so they did not target it. The money, the heat and the growth are in serving models, not in making them.

Analog is a medium for knowing, not yet for learning. It plays the record beautifully. It cannot yet cut one.

05 · The next wallMemory that has to forget

There is a catch inside inference itself. A transformer has two kinds of numbers. The weights are fixed, so they suit a crossbar perfectly. But attention also keeps a running memory of the conversation so far, the key-value cache, and that memory is written fresh with every word. It is a moving target, and today it is a large share of the energy spent serving long conversations.

The most elegant answer I have seen came from Forschungszentrum Jülich and RWTH Aachen, published in Nature Computational Science in September 2025. They store the cache in gain cells, little capacitors that can be written quickly and read without being erased, and they compute attention right there in the array. The capacitors leak. Their charge fades in milliseconds. Normally that would be fatal, but the design uses sliding-window attention, which only needs to remember a recent stretch of the conversation, so the fading is simply the window closing. Forgetting stops being a defect and becomes the eviction policy. Their simulations put the attention step thousands of times faster and tens of thousands of times more energy-efficient than a data-center GPU doing the same job.

I wrote earlier today that forgetting used to be free and that AI made it something we must design. Here it is in hardware. The cheapest memory for an AI conversation may be one that fades on schedule, exactly as fast as the conversation moves on.

06 · State of the fieldWhere things stand, November 2026

Here is the field as it stands this week, grouped by what each effort is really attempting. The pattern is the point: nearly everything shipping is inference, nearly everything about training is still in the lab, and the biggest bets are at the edge, not in the data center.

• Inference · research to product path

  IBM Research

  The deepest bench. A 14-nm chip with 35 million phase-change devices ran speech models at up to 12.4 trillion operations per second per watt. Since then: the first transformer run on an analog chip with all static-weight multiplies in memory, a design that stacks mixture-of-experts layers in 3D analog memory, and the Analog Foundation Models method for adapting LLMs to noise.

• Inference · shipping

  EnCharge AI

  A Princeton spinout. Its EN100 sums charge on precise metal capacitors and is sold as an M.2 card for laptops and a PCIe card for workstations, rated at more than 200 trillion operations per second within a laptop-class power budget of roughly eight watts.

• Inference · automotive

  Mythic

  One of the longest-running analog startups closed a $125 million round in December 2025. In February, Honda agreed to license its analog processor and co-develop an automotive chip, with prototypes in test vehicles by the late 2020s or early 2030s.

• Inference · new silicon

  TetraMem and SK hynix

  Multi-level resistive RAM on TSMC’s 22-nm process, validated in silicon in May with evaluation kits due in the second half of the year, a joint chip with SK hynix in July, and a 12-nm successor taped out in October that holds 64 million 4-bit parameters on-chip with no external memory for weights.

• Inference · data center

  Sagence AI

  Runs multi-level flash cells in deep subthreshold, a regime where they draw almost no current, and pitches rack-scale LLM inference at a fraction of a GPU system’s power and cost. Its product claims are still claims until third parties measure them.

• Training · laboratory

  Peking University

  Sun Zhong’s group solved matrix equations on resistive memory with digital-grade precision in Nature Electronics in October 2025, then trained recommendation and compression models in January. The strongest evidence so far that analog can do some kinds of learning, not just recall.

• Training · devices and algorithms

  ECRAM and new optimizers

  Electrochemical cells from POSTECH, MIT and IBM nudge more symmetrically than any other analog device; residual and Tiki-Taka style algorithms tolerate the cells that do not. Both are still at array scale, not model scale.

• Light · a telling pivot

  Lightmatter and Microsoft

  Lightmatter ran ResNet and BERT on a photonic processor in Nature in 2025, yet its products lead with light for moving data between chips. Microsoft built an analog optical computer for inference and optimization. Light is winning first as a better channel, which is the principle again.

• Beyond multiplying · early

  Thermodynamic sampling

  Extropic and Normal Computing use the random jitter of circuits to draw samples from probability distributions directly. Extropic signed a letter of intent for CHIPS funding in July and describes a Z1 chip for early access in 2027. A different bet: not faster math, but less of it.

07 · What I expectSix predictions

1. Training and inference will split into different physics.

   Today the same kind of GPU makes a model and serves it. Within this decade they will be different machines from different suppliers built on different materials: precise digital silicon in the studio, analog and near-memory silicon in the field. The split will look obvious in hindsight, the way graphics cards splitting from CPUs does now.

2. Models will ship tempered for a substrate.

   A short final phase of noise-aware training will become as routine as quantization is now. Model cards will say which chip families a model was tempered for, and the same model will come in a digital cut and an analog cut, like a song mastered for vinyl and for streaming.

3. The first analog AI most people use will be invisible.

   It will arrive in cars, laptops, cameras, hearing aids and robots before it arrives in data centers, because power and heat matter most where batteries and enclosures are small. Nobody will buy an analog chip. They will buy a thing that lasts all day and stays cool.

4. Weights will become physical objects you can own.

   A model held in non-volatile analog cells is not downloaded each time; it is a property of a part. Updating it will feel more like replacing firmware, or a cartridge, than refreshing an app. That makes local, personal AI cheaper to run and harder to take away.

5. Pretraining stays digital through 2030.

   The first real analog role in pretraining will be hybrid: analog hardware doing the bulk multiplies of forward and backward passes, with exact master weights kept and updated digitally, the way mixed-precision training works today. Fully in-memory pretraining of a frontier-scale model will not happen before 2030.

6. The price of a thought will fall toward the price of reading it once.

   When weights stop moving, the energy per token stops being set by memory traffic and starts being set by the converters at the edges of the arrays. That floor is far lower than today’s. The economics of answering will change faster than the economics of training, and the cheap side of AI will get cheaper first.

I have a personal stake in the third and fourth of those. I spent the early part of my career building E2open, in supply chains, and the oldest lesson in that business is that the expensive part of a product is rarely making it. It is moving it. AI chips are a supply chain for numbers, and analog is what happens when somebody finally builds the factory inside the warehouse. I also argue, to anyone who will listen, that personal AI matters more than enterprise AI, that every business should let people bring their own AI. That argument has always had a hardware problem: the best models lived in somebody else’s building because only that building could afford to feed them. A chip that stops walking is the hardware half of the argument. It lets the model live with you.

08 · AccountabilityClaim ledger

Training and inference split into different physics

Already trueEvery shipping analog AI product in the record is inference-only, and the inference-only startups are the ones raising money and signing customers.

What has to happenOne analog or near-memory inference platform has to win a large, repeatable deployment at the edge, so that inference silicon has a market of its own.

Where I am probably wrongIf digital GPUs keep improving memory bandwidth fast enough, one architecture may stay good enough for both jobs and the split stays commercial rather than physical.

Models ship tempered for a substrate

Already trueIBM adapted Phi-3-mini and Llama-3.2-1B to analog noise with under 1% of pretraining data; quantization-aware variants are already standard practice.

What has to happenA major model maker publishes an official analog-tempered release, and a chip vendor ships it by default.

Where I am probably wrongIf chips get precise enough to run stock 4-bit models with no adaptation, tempering becomes invisible plumbing rather than a labeled cut.

The first mass analog AI is invisible, at the edge

Already trueEnCharge sells laptop and workstation cards; Honda has committed to an analog automotive chip; TetraMem targets audio, vision and small language models.

What has to happenOne of these appears inside a consumer product sold in volume, with battery life or heat as the headline benefit.

Where I am probably wrongIf a data-center buyer facing power limits adopts analog inference at scale first, the first mass deployment will be in the cloud and invisible for a different reason.

Pretraining stays digital through 2030

Already truePublished analog training is at array and small-model scale; device asymmetry and the 8-bit-state requirement remain open problems.

What has to happenNothing; this is the default. It breaks only if a device with symmetric, many-state updates reaches foundry volume.

Where I am probably wrongIf ECRAM or a new optimizer cracks symmetric updates and a hybrid analog trainer pretrains a model of a billion parameters or more before 2030, I am wrong, and gladly.

Back to the phone in your hand at 9:14 p.m. It answered your question well. It also carried the same billions of numbers back and forth for every word, because that is how we have built computers since 1945. The weights never needed to travel. They were the answer the whole time, sitting in memory, waiting for a voltage.

Leave the weights where they are. The wire will do the math.